From Less Batteries to Battery-Less: Enabling A Greener World through Ultra-Wide Power-Performance Adaptation down to pWs
Prof. Massimo Alioto, Ph.D.
ECE - National University of Singapore
E-mail: massimo.alioto@nus.edu.sg, malioto@ieee.org
Biography
Massimo Alioto is with the ECE Department of the National University of Singapore, where he leads the Green IC group and the Integrated Circuits and Embedded Systems area. Previously, he held positions at the University of Siena, Intel Labs – CRL (2013), University of Michigan - Ann Arbor (2011-2012), University of California – Berkeley (2009-2011), EPFL - Lausanne.
He is (co)author of 270+ publications on journals and conference proceedings, and three books with Springer. His primary research interests include ultra-low power circuits and systems, self-powered integrated systems, near-threshold circuits for green computing, widely energy-scalable integrated systems, circuits for machine intelligence, hardware security, and emerging technologies.
He is the Editor in Chief of the IEEE Transactions on VLSI Systems, and was Deputy Editor in Chief of the IEEE Journal on Emerging and Selected Topics in Circuits and Systems. Prof. Alioto was the Chair of the “VLSI Systems and Applications” Technical Committee of the IEEE CASS (2010-2012), Distinguished Lecturer (2009-2010), and members of the Board of Governors (2015-2020). He served as Guest Editor of numerous journal special issues, Technical Program Chair of several IEEE conferences (ISCAS 2022, SOCC, PRIME, ICECS, VARI, NEWCAS, ICM), and TPC member (ISSCC, ASSCC).Prof. Alioto is an IEEE Fellow.
Abstract
Aggressive battery shrinkage and its ultimate elimination are a crucial goal for our community, in view of the massive environmental impact of their production and disposal for the expected Trillion of IoT devices that will be deployed in the upcoming decade. From a technological viewpoint, this goal mandates ultra-wide energy adaptation in energy-autonomous integrated systems that are subject to wide variability in power availability, performance target and incoming data context. Adaptation is a prerequisite to assure continuous operation in spite of the limited and widely fluctuating energy source (e.g., battery discharge, harvested power), swift response upon the occurrence of events of interest (e.g., on-chip data analytics), and save energy by leveraging the quality slack offered by the task at hand, while maintaining extremely low consumption in the common case. These requirements have led to the strong demand of a new breed of integrated systems having an extremely wide energy/power scalability and adaptation, beyond conventional voltage scaling.
In this talk, new techniques that drastically extend the performance-power scalability of digital circuits and architectures are presented, introducing adapt-ability as replacement of conventional design margining. Silicon demonstrations of better-than-voltage-scaling adaptation to the workload are illustrated for both the data path (i.e., micro-architecture) and the clock path. Adaptation to a very wide range of energy/power availability is also discussed, presenting demonstrations of always-on systems (e.g., microcontrollers, power management units) with power down to sub-nW, and duty-cycled operation down to pW range. Several silicon demonstrations are illustrated to quantify the benefits offered by wide power-performance adaptation, identify opportunities for the decade ahead to drastically reduce the need for batteries, and tackle the environmental challenges that are imposed by “the next trillion batteries”.